Lamp-Da 0.1
A compact lantern project
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usb_pd.h
1/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
2 * Use of this source code is governed by a BSD-style license that can be
3 * found in the LICENSE file.
4 */
5
6/* USB Power delivery module */
7
8#ifndef __USB_PD_H
9#define __USB_PD_H
10
11#ifdef __cplusplus
12extern "C" {
13#endif
14
15#include "config.h"
16#include "task.h"
17#include "drivers/tcpm_driver.h"
18#include "drivers/usb_pd_driver.h"
19
20/* Time units in microseconds */
21#define MSEC_US (1000ul)
22#define SECOND_US (1000000ul)
23#define MINUTE_US (60000000ul)
24#define HOUR_US (3600000000ul) /* Too big to fit in a signed int */
25
26/* PD Host command timeout */
27#define PD_HOST_COMMAND_TIMEOUT_US SECOND_US
28
29 enum pd_rx_errors
30 {
31 PD_RX_ERR_INVAL = -1, /* Invalid packet */
32 PD_RX_ERR_HARD_RESET = -2, /* Got a Hard-Reset packet */
33 PD_RX_ERR_CRC = -3, /* CRC mismatch */
34 PD_RX_ERR_ID = -4, /* Invalid ID number */
35 PD_RX_ERR_UNSUPPORTED_SOP = -5, /* Unsupported SOP */
36 PD_RX_ERR_CABLE_RESET = -6 /* Got a Cable-Reset packet */
37 };
38
39/* Events for USB PD task */
40#define PD_EVENT_TX (1 << 3) /* Outgoing packet event */
41#define PD_EVENT_CC (1 << 4) /* CC line change event */
42#define PD_EVENT_TCPC_RESET (1 << 5) /* TCPC has reset */
43#define PD_EVENT_UPDATE_DUAL_ROLE (1 << 6) /* DRP state has changed */
44#define PD_EVENT_DEVICE_ACCESSED (1 << 7)
45#define PD_EVENT_POWER_STATE_CHANGE (1 << 8)
46#define PD_EVENT_RX_HARD_RESET (1 << 11) /* Receive a Hard Reset. */
47
48/* --- PD data message helpers --- */
49#define PDO_MAX_OBJECTS 7
50#define PDO_MODES (PDO_MAX_OBJECTS - 1)
51
52/* PDO : Power Data Object */
53/*
54 * 1. The vSafe5V Fixed Supply Object shall always be the first object.
55 * 2. The remaining Fixed Supply Objects,
56 * if present, shall be sent in voltage order; lowest to highest.
57 * 3. The Battery Supply Objects,
58 * if present shall be sent in Minimum Voltage order; lowest to highest.
59 * 4. The Variable Supply (non battery) Objects,
60 * if present, shall be sent in Minimum Voltage order; lowest to highest.
61 * 5. (PD3.0) The Augmented PDO is defined to allow extension beyond the 4 PDOs
62 * above by examining bits <29:28> to determine the additional PDO function.
63 */
64#define PDO_TYPE_FIXED (0 << 30)
65#define PDO_TYPE_BATTERY (1 << 30)
66#define PDO_TYPE_VARIABLE (2 << 30)
67#define PDO_TYPE_AUGMENTED (3 << 30)
68#define PDO_TYPE_MASK (3 << 30)
69
70#define PDO_FIXED_DUAL_ROLE (1L << 29) /* Dual role device */
71#define PDO_FIXED_SUSPEND (1L << 28) /* USB Suspend supported */
72#define PDO_FIXED_EXTERNAL (1L << 27) /* Externally powered */
73#define PDO_FIXED_COMM_CAP (1L << 26) /* USB Communications Capable */
74#define PDO_FIXED_DATA_SWAP (1L << 25) /* Data role swap command supported */
75#define PDO_FIXED_PEAK_CURR () /* [21..20] Peak current */
76#define PDO_FIXED_VOLT(mv) (((mv) / 50L) << 10) /* Voltage in 50mV units */
77#define PDO_FIXED_CURR(ma) (((ma) / 10L) << 0) /* Max current in 10mA units */
78
79#define PDO_FIXED(mv, ma, flags) (PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma) | (flags))
80
81#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50L) & 0x3FF) << 20)
82#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50L) & 0x3FF) << 10)
83#define PDO_VAR_OP_CURR(ma) ((((ma) / 10L) & 0x3FF) << 0)
84
85#define PDO_VAR(min_mv, max_mv, op_ma) \
86 (PDO_VAR_MIN_VOLT(min_mv) | PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_OP_CURR(op_ma) | PDO_TYPE_VARIABLE)
87
88#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50L) & 0x3FF) << 20)
89#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50L) & 0x3FF) << 10)
90#define PDO_BATT_OP_POWER(mw) ((((mw) / 250L) & 0x3FF) << 0)
91
92#define PDO_BATT(min_mv, max_mv, op_mw) \
93 (PDO_BATT_MIN_VOLT(min_mv) | PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_OP_POWER(op_mw) | PDO_TYPE_BATTERY)
94
95/* RDO : Request Data Object */
96#define RDO_OBJ_POS(n) (((n) & 0x7) << 28)
97#define RDO_POS(rdo) (((rdo) >> 28) & 0x7)
98#define RDO_GIVE_BACK (1 << 27)
99#define RDO_CAP_MISMATCH (1 << 26)
100#define RDO_COMM_CAP (1 << 25)
101#define RDO_NO_SUSPEND (1 << 24)
102#define RDO_FIXED_VAR_OP_CURR(ma) ((((ma) / 10) & 0x3FF) << 10)
103#define RDO_FIXED_VAR_MAX_CURR(ma) ((((ma) / 10) & 0x3FF) << 0)
104
105#define RDO_BATT_OP_POWER(mw) ((((mw) / 250) & 0x3FF) << 10)
106#define RDO_BATT_MAX_POWER(mw) ((((mw) / 250) & 0x3FF) << 10)
107
108#define RDO_FIXED(n, op_ma, max_ma, flags) \
109 (RDO_OBJ_POS(n) | (flags) | RDO_FIXED_VAR_OP_CURR(op_ma) | RDO_FIXED_VAR_MAX_CURR(max_ma))
110
111#define RDO_BATT(n, op_mw, max_mw, flags) \
112 (RDO_OBJ_POS(n) | (flags) | RDO_BATT_OP_POWER(op_mw) | RDO_BATT_MAX_POWER(max_mw))
113
114/* BDO : BIST Data Object */
115#define BDO_MODE_RECV (0 << 28)
116#define BDO_MODE_TRANSMIT (1 << 28)
117#define BDO_MODE_COUNTERS (2 << 28)
118#define BDO_MODE_CARRIER0 (3 << 28)
119#define BDO_MODE_CARRIER1 (4 << 28)
120#define BDO_MODE_CARRIER2 (5 << 28)
121#define BDO_MODE_CARRIER3 (6 << 28)
122#define BDO_MODE_EYE (7 << 28)
123
124#define BDO(mode, cnt) ((mode) | ((cnt) & 0xFFFF))
125
126#define SVID_DISCOVERY_MAX 16
127
128/* Timers */
129#define PD_T_SINK_TX (18 * MSEC_US) /* between 16ms and 20 */
130#define PD_T_CHUNKING_NOT_SUPPORTED (45 * MSEC_US) /* between 40ms and 50ms */
131#define PD_T_CHUNK_SENDER_RSP (24 * MSEC_US) /* between 24ms and 30ms */
132#define PD_T_CHUNK_SENDER_REQ (24 * MSEC_US) /* between 24ms and 30ms */
133#define PD_T_HARD_RESET_COMPLETE (5 * MSEC_US) /* between 4ms and 5ms*/
134#define PD_T_HARD_RESET_RETRY (1 * MSEC_US) /* 1ms */
135#define PD_T_SEND_SOURCE_CAP (100 * MSEC_US) /* between 100ms and 200ms */
136#define PD_T_SINK_WAIT_CAP (600 * MSEC_US) /* between 310ms and 620ms */
137#define PD_T_SINK_TRANSITION (35 * MSEC_US) /* between 20ms and 35ms */
138#define PD_T_SOURCE_ACTIVITY (45 * MSEC_US) /* between 40ms and 50ms */
139#define PD_T_SENDER_RESPONSE (30 * MSEC_US) /* between 24ms and 30ms */
140#define PD_T_PS_TRANSITION (500 * MSEC_US) /* between 450ms and 550ms */
141#define PD_T_PS_SOURCE_ON (480 * MSEC_US) /* between 390ms and 480ms */
142#define PD_T_PS_SOURCE_OFF (920 * MSEC_US) /* between 750ms and 920ms */
143#define PD_T_PS_HARD_RESET (25 * MSEC_US) /* between 25ms and 35ms */
144#define PD_T_ERROR_RECOVERY (240 * MSEC_US) /* min 240ms if sourcing VConn */
145#define PD_T_CC_DEBOUNCE (100 * MSEC_US) /* between 100ms and 200ms */
146/* DRP_SNK + DRP_SRC must be between 50ms and 100ms with 30%-70% duty cycle */
147#define PD_T_DRP_SNK (40 * MSEC_US) /* toggle time for sink DRP */
148#define PD_T_DRP_SRC (30 * MSEC_US) /* toggle time for source DRP */
149#define PD_T_DEBOUNCE (15 * MSEC_US) /* between 10ms and 20ms */
150#define PD_T_TRY_CC_DEBOUNCE (15 * MSEC_US) /* between 10ms and 20ms */
151#define PD_T_SINK_ADJ (55 * MSEC_US) /* between tPDDebounce and 60ms */
152#define PD_T_SRC_RECOVER (760 * MSEC_US) /* between 660ms and 1000ms */
153#define PD_T_SRC_RECOVER_MAX (1000 * MSEC_US) /* 1000ms */
154#define PD_T_SRC_TURN_ON (275 * MSEC_US) /* 275ms */
155#define PD_T_SAFE_0V (650 * MSEC_US) /* 650ms */
156#define PD_T_NO_RESPONSE (5500 * MSEC_US) /* between 4.5s and 5.5s */
157#define PD_T_BIST_TRANSMIT (50 * MSEC_US) /* 50ms (for task_wait arg) */
158#define PD_T_BIST_RECEIVE (60 * MSEC_US) /* 60ms (time to process bist) */
159#define PD_T_BIST_CONT_MODE (60 * MSEC_US) /* 30ms to 60ms */
160#define PD_T_VCONN_SOURCE_ON (100 * MSEC_US) /* 100ms */
161#define PD_T_DRP_TRY (125 * MSEC_US) /* between 75ms and 150ms */
162#define PD_T_TRY_TIMEOUT (550 * MSEC_US) /* between 550ms and 1100ms */
163#define PD_T_TRY_WAIT (600 * MSEC_US) /* Wait time for TryWait.SNK */
164#define PD_T_SINK_REQUEST (100 * MSEC_US) /* 100ms before next request */
165#define PD_T_PD_DEBOUNCE (15 * MSEC_US) /* between 10ms and 20ms */
166#define PD_T_CHUNK_SENDER_RESPONSE (25 * MSEC_US) /* 25ms */
167#define PD_T_CHUNK_SENDER_REQUEST (25 * MSEC_US) /* 25ms */
168#define PD_T_SWAP_SOURCE_START (25 * MSEC_US) /* Min of 20ms */
169#define PD_T_RP_VALUE_CHANGE (20 * MSEC_US) /* 20ms */
170#define PD_T_SRC_DISCONNECT (15 * MSEC_US) /* 15ms */
171#define PD_T_VCONN_STABLE (50 * MSEC_US) /* 50ms */
172#define PD_T_DISCOVER_IDENTITY (45 * MSEC_US) /* between 40ms and 50ms */
173#define PD_T_SYSJUMP (1000 * MSEC_US) /* 1s */
174#define PD_T_PR_SWAP_WAIT (100 * MSEC_US) /* tPRSwapWait 100ms */
175
176/* number of edges and time window to detect CC line is not idle */
177#define PD_RX_TRANSITION_COUNT 3
178#define PD_RX_TRANSITION_WINDOW 20 /* between 12us and 20us */
179
180/* from USB Type-C Specification Table 5-1 */
181#define PD_T_AME (1 * SECOND_US) /* timeout from UFP attach to Alt Mode Entry */
182
183/* VDM Timers ( USB PD Spec Rev2.0 Table 6-30 )*/
184#define PD_T_VDM_BUSY (100 * MSEC_US) /* at least 100ms */
185#define PD_T_VDM_E_MODE (25 * MSEC_US) /* enter/exit the same max */
186#define PD_T_VDM_RCVR_RSP (15 * MSEC_US) /* max of 15ms */
187#define PD_T_VDM_SNDR_RSP (30 * MSEC_US) /* max of 30ms */
188#define PD_T_VDM_WAIT_MODE_E (100 * MSEC_US) /* enter/exit the same max */
189
190 enum pd_drp_next_states
191 {
192 DRP_TC_DEFAULT,
193 DRP_TC_UNATTACHED_SNK,
194 DRP_TC_ATTACHED_WAIT_SNK,
195 DRP_TC_UNATTACHED_SRC,
196 DRP_TC_ATTACHED_WAIT_SRC,
197 DRP_TC_DRP_AUTO_TOGGLE
198 };
199
200 /* function table for entered mode */
201 struct amode_fx
202 {
203 int (*status)(uint32_t* payload);
204 int (*config)(uint32_t* payload);
205 };
206
207 /* function table for alternate mode capable responders */
208 struct svdm_response
209 {
210 int (*identity)(uint32_t* payload);
211 int (*svids)(uint32_t* payload);
212 int (*modes)(uint32_t* payload);
213 int (*enter_mode)(uint32_t* payload);
214 int (*exit_mode)(uint32_t* payload);
215 struct amode_fx* amode;
216 };
217
218 struct svdm_svid_data
219 {
220 uint16_t svid;
221 int mode_cnt;
222 uint32_t mode_vdo[PDO_MODES];
223 };
224
225 struct svdm_amode_fx
226 {
227 uint16_t svid;
228 int (*enter)(uint32_t mode_caps);
229 int (*status)(uint32_t* payload);
230 int (*config)(uint32_t* payload);
231 void (*post_config)();
232 int (*attention)(uint32_t* payload);
233 void (*exit)();
234 };
235
236 /* defined in <board>/usb_pd_policy.c */
237 /* All UFP_U should have */
238 extern const struct svdm_response svdm_rsp;
239 /* All DFP_U should have */
240 extern const struct svdm_amode_fx supported_modes[];
241 extern const int supported_modes_cnt;
242
243 /* DFP data needed to support alternate mode entry and exit */
244 struct svdm_amode_data
245 {
246 const struct svdm_amode_fx* fx;
247 /* VDM object position */
248 int opos;
249 /* mode capabilities specific to SVID amode. */
250 struct svdm_svid_data* data;
251 };
252
253 enum hpd_event
254 {
255 hpd_none,
256 hpd_low,
257 hpd_high,
258 hpd_irq,
259 };
260
261/* DisplayPort flags */
262#define DP_FLAGS_DP_ON (1 << 0) /* Display port mode is on */
263#define DP_FLAGS_HPD_HI_PENDING (1 << 1) /* Pending HPD_HI */
264
265 /* supported alternate modes */
266 enum pd_alternate_modes
267 {
268 PD_AMODE_GOOGLE,
269 PD_AMODE_DISPLAYPORT,
270 /* not a real mode */
271 PD_AMODE_COUNT,
272 };
273
274 /* Policy structure for driving alternate mode */
275 struct pd_policy
276 {
277 /* index of svid currently being operated on */
278 int svid_idx;
279 /* count of svids discovered */
280 int svid_cnt;
281 /* SVDM identity info (Id, Cert Stat, 0-4 Typec specific) */
282 uint32_t identity[PDO_MAX_OBJECTS - 1];
283 /* supported svids & corresponding vdo mode data */
284 struct svdm_svid_data svids[SVID_DISCOVERY_MAX];
285 /* active modes */
286 struct svdm_amode_data amodes[PD_AMODE_COUNT];
287 /* Next index to insert DFP alternate mode into amodes */
288 int amode_idx;
289 };
290
291 /*
292 * VDO : Vendor Defined Message Object
293 * VDM object is minimum of VDM header + 6 additional data objects.
294 */
295
296#define VDO_MAX_SIZE 7
297
298#define VDM_VER10 0
299#define VDM_VER20 1
300
301/*
302 * VDM header
303 * ----------
304 * <31:16> :: SVID
305 * <15> :: VDM type ( 1b == structured, 0b == unstructured )
306 * <14:13> :: Structured VDM version (00b == Rev 2.0, 01b == Rev 3.0 )
307 * <12:11> :: reserved
308 * <10:8> :: object position (1-7 valid ... used for enter/exit mode only)
309 * <7:6> :: command type (SVDM only?)
310 * <5> :: reserved (SVDM), command type (UVDM)
311 * <4:0> :: command
312 */
313#define VDO(vid, type, custom) (((vid) << 16) | ((type) << 15) | ((custom) & 0x7FFF))
314
315#define VDO_SVDM_TYPE (1 << 15)
316#define VDO_SVDM_VERS(x) (x << 13)
317#define VDO_OPOS(x) (x << 8)
318#define VDO_CMDT(x) (x << 6)
319#define VDO_OPOS_MASK VDO_OPOS(0x7)
320#define VDO_CMDT_MASK VDO_CMDT(0x3)
321
322#define CMDT_INIT 0
323#define CMDT_RSP_ACK 1
324#define CMDT_RSP_NAK 2
325#define CMDT_RSP_BUSY 3
326
327/* reserved for SVDM ... for Google UVDM */
328#define VDO_SRC_INITIATOR (0 << 5)
329#define VDO_SRC_RESPONDER (1 << 5)
330
331#define CMD_DISCOVER_IDENT 1
332#define CMD_DISCOVER_SVID 2
333#define CMD_DISCOVER_MODES 3
334#define CMD_ENTER_MODE 4
335#define CMD_EXIT_MODE 5
336#define CMD_ATTENTION 6
337#define CMD_DP_STATUS 16
338#define CMD_DP_CONFIG 17
339
340#define VDO_CMD_VENDOR(x) (((10 + (x)) & 0x1f))
341
342/* ChromeOS specific commands */
343#define VDO_CMD_VERSION VDO_CMD_VENDOR(0)
344#define VDO_CMD_SEND_INFO VDO_CMD_VENDOR(1)
345#define VDO_CMD_READ_INFO VDO_CMD_VENDOR(2)
346#define VDO_CMD_REBOOT VDO_CMD_VENDOR(5)
347#define VDO_CMD_FLASH_ERASE VDO_CMD_VENDOR(6)
348#define VDO_CMD_FLASH_WRITE VDO_CMD_VENDOR(7)
349#define VDO_CMD_ERASE_SIG VDO_CMD_VENDOR(8)
350#define VDO_CMD_PING_ENABLE VDO_CMD_VENDOR(10)
351#define VDO_CMD_CURRENT VDO_CMD_VENDOR(11)
352#define VDO_CMD_FLIP VDO_CMD_VENDOR(12)
353#define VDO_CMD_GET_LOG VDO_CMD_VENDOR(13)
354#define VDO_CMD_CCD_EN VDO_CMD_VENDOR(14)
355
356#define PD_VDO_VID(vdo) ((vdo) >> 16)
357#define PD_VDO_SVDM(vdo) (((vdo) >> 15) & 1)
358#define PD_VDO_OPOS(vdo) (((vdo) >> 8) & 0x7)
359#define PD_VDO_CMD(vdo) ((vdo) & 0x1f)
360#define PD_VDO_CMDT(vdo) (((vdo) >> 6) & 0x3)
361
362/*
363 * SVDM Identity request -> response
364 *
365 * Request is simply properly formatted SVDM header
366 *
367 * Response is 4 data objects:
368 * [0] :: SVDM header
369 * [1] :: Identitiy header
370 * [2] :: Cert Stat VDO
371 * [3] :: (Product | Cable) VDO
372 * [4] :: AMA VDO
373 *
374 */
375#define VDO_INDEX_HDR 0
376#define VDO_INDEX_IDH 1
377#define VDO_INDEX_CSTAT 2
378#define VDO_INDEX_CABLE 3
379#define VDO_INDEX_PRODUCT 3
380#define VDO_INDEX_AMA 4
381#define VDO_I(name) VDO_INDEX_##name
382
383/*
384 * SVDM Identity Header
385 * --------------------
386 * <31> :: data capable as a USB host
387 * <30> :: data capable as a USB device
388 * <29:27> :: product type
389 * <26> :: modal operation supported (1b == yes)
390 * <25:16> :: SBZ
391 * <15:0> :: USB-IF assigned VID for this cable vendor
392 */
393#define IDH_PTYPE_UNDEF 0
394#define IDH_PTYPE_HUB 1
395#define IDH_PTYPE_PERIPH 2
396#define IDH_PTYPE_PCABLE 3
397#define IDH_PTYPE_ACABLE 4
398#define IDH_PTYPE_AMA 5
399
400#define VDO_IDH(usbh, usbd, ptype, is_modal, vid) \
401 ((usbh) << 31 | (usbd) << 30 | ((ptype) & 0x7) << 27 | (is_modal) << 26 | ((vid) & 0xffff))
402
403#define PD_IDH_PTYPE(vdo) (((vdo) >> 27) & 0x7)
404#define PD_IDH_VID(vdo) ((vdo) & 0xffff)
405
406/*
407 * Cert Stat VDO
408 * -------------
409 * <31:20> : SBZ
410 * <19:0> : USB-IF assigned TID for this cable
411 */
412#define VDO_CSTAT(tid) ((tid) & 0xfffff)
413#define PD_CSTAT_TID(vdo) ((vdo) & 0xfffff)
414
415/*
416 * Product VDO
417 * -----------
418 * <31:16> : USB Product ID
419 * <15:0> : USB bcdDevice
420 */
421#define VDO_PRODUCT(pid, bcd) (((pid) & 0xffff) << 16 | ((bcd) & 0xffff))
422#define PD_PRODUCT_PID(vdo) (((vdo) >> 16) & 0xffff)
423
424/*
425 * Message id starts from 0 to 7. If last_msg_id is initialized to 0,
426 * it will lead to repetitive message id with first received packet,
427 * so initialize it with an invalid value 0xff.
428 */
429#define INVALID_MSG_ID_COUNTER 0xff
430
431/*
432 * AMA VDO
433 * ---------
434 * <31:28> :: Cable HW version
435 * <27:24> :: Cable FW version
436 * <23:12> :: SBZ
437 * <11> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
438 * <10> :: SSTX2 Directionality support
439 * <9> :: SSRX1 Directionality support
440 * <8> :: SSRX2 Directionality support
441 * <7:5> :: Vconn power
442 * <4> :: Vconn power required
443 * <3> :: Vbus power required
444 * <2:0> :: USB SS Signaling support
445 */
446#define VDO_AMA(hw, fw, tx1d, tx2d, rx1d, rx2d, vcpwr, vcr, vbr, usbss) \
447 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | (tx1d) << 11 | (tx2d) << 10 | (rx1d) << 9 | (rx2d) << 8 | \
448 ((vcpwr) & 0x3) << 5 | (vcr) << 4 | (vbr) << 3 | ((usbss) & 0x7))
449
450#define PD_VDO_AMA_VCONN_REQ(vdo) (((vdo) >> 4) & 1)
451#define PD_VDO_AMA_VBUS_REQ(vdo) (((vdo) >> 3) & 1)
452
453/*
454 * SVDM Discover SVIDs request -> response
455 *
456 * Request is properly formatted VDM Header with discover SVIDs command.
457 * Response is a set of SVIDs of all all supported SVIDs with all zero's to
458 * mark the end of SVIDs. If more than 12 SVIDs are supported command SHOULD be
459 * repeated.
460 */
461#define VDO_SVID(svid0, svid1) (((svid0) & 0xffff) << 16 | ((svid1) & 0xffff))
462#define PD_VDO_SVID_SVID0(vdo) ((vdo) >> 16)
463#define PD_VDO_SVID_SVID1(vdo) ((vdo) & 0xffff)
464
465/*
466 * DisplayPort modes capabilities
467 * -------------------------------
468 * <31:24> : SBZ
469 * <23:16> : UFP_D pin assignment supported
470 * <15:8> : DFP_D pin assignment supported
471 * <7> : USB 2.0 signaling (0b=yes, 1b=no)
472 * <6> : Plug | Receptacle (0b == plug, 1b == receptacle)
473 * <5:2> : xxx1: Supports DPv1.3, xx1x Supports USB Gen 2 signaling
474 * Other bits are reserved.
475 * <1:0> : signal direction ( 00b=rsv, 01b=sink, 10b=src 11b=both )
476 */
477#define VDO_MODE_DP(snkp, srcp, usb, gdr, sign, sdir) \
478 (((snkp) & 0xff) << 16 | ((srcp) & 0xff) << 8 | ((usb) & 1) << 7 | ((gdr) & 1) << 6 | ((sign) & 0xF) << 2 | \
479 ((sdir) & 0x3))
480#define PD_DP_PIN_CAPS(x) ((((x) >> 6) & 0x1) ? (((x) >> 16) & 0x3f) : (((x) >> 8) & 0x3f))
481
482#define MODE_DP_PIN_A 0x01
483#define MODE_DP_PIN_B 0x02
484#define MODE_DP_PIN_C 0x04
485#define MODE_DP_PIN_D 0x08
486#define MODE_DP_PIN_E 0x10
487#define MODE_DP_PIN_F 0x20
488
489/* Pin configs B/D/F support multi-function */
490#define MODE_DP_PIN_MF_MASK 0x2a
491/* Pin configs A/B support BR2 signaling levels */
492#define MODE_DP_PIN_BR2_MASK 0x3
493/* Pin configs C/D/E/F support DP signaling levels */
494#define MODE_DP_PIN_DP_MASK 0x3c
495
496#define MODE_DP_V13 0x1
497#define MODE_DP_GEN2 0x2
498
499#define MODE_DP_SNK 0x1
500#define MODE_DP_SRC 0x2
501#define MODE_DP_BOTH 0x3
502
503/*
504 * DisplayPort Status VDO
505 * ----------------------
506 * <31:9> : SBZ
507 * <8> : IRQ_HPD : 1 == irq arrived since last message otherwise 0.
508 * <7> : HPD state : 0 = HPD_LOW, 1 == HPD_HIGH
509 * <6> : Exit DP Alt mode: 0 == maintain, 1 == exit
510 * <5> : USB config : 0 == maintain current, 1 == switch to USB from DP
511 * <4> : Multi-function preference : 0 == no pref, 1 == MF preferred.
512 * <3> : enabled : is DPout on/off.
513 * <2> : power low : 0 == normal or LPM disabled, 1 == DP disabled for LPM
514 * <1:0> : connect status : 00b == no (DFP|UFP)_D is connected or disabled.
515 * 01b == DFP_D connected, 10b == UFP_D connected, 11b == both.
516 */
517#define VDO_DP_STATUS(irq, lvl, amode, usbc, mf, en, lp, conn) \
518 (((irq) & 1) << 8 | ((lvl) & 1) << 7 | ((amode) & 1) << 6 | ((usbc) & 1) << 5 | ((mf) & 1) << 4 | ((en) & 1) << 3 | \
519 ((lp) & 1) << 2 | ((conn & 0x3) << 0))
520
521#define PD_VDO_DPSTS_HPD_IRQ(x) (((x) >> 8) & 1)
522#define PD_VDO_DPSTS_HPD_LVL(x) (((x) >> 7) & 1)
523#define PD_VDO_DPSTS_MF_PREF(x) (((x) >> 4) & 1)
524
525/* Per DisplayPort Spec v1.3 Section 3.3 */
526#define HPD_USTREAM_DEBOUNCE_LVL (2 * MSEC_US)
527#define HPD_USTREAM_DEBOUNCE_IRQ (250)
528#define HPD_DSTREAM_DEBOUNCE_IRQ (500) /* between 500-1000us */
529
530/*
531 * DisplayPort Configure VDO
532 * -------------------------
533 * <31:24> : SBZ
534 * <23:16> : SBZ
535 * <15:8> : Pin assignment requested. Choose one from mode caps.
536 * <7:6> : SBZ
537 * <5:2> : signalling : 1h == DP v1.3, 2h == Gen 2
538 * Oh is only for USB, remaining values are reserved
539 * <1:0> : cfg : 00 == USB, 01 == DFP_D, 10 == UFP_D, 11 == reserved
540 */
541#define VDO_DP_CFG(pin, sig, cfg) (((pin) & 0xff) << 8 | ((sig) & 0xf) << 2 | ((cfg) & 0x3))
542
543#define PD_DP_CFG_DPON(x) (((x & 0x3) == 1) || ((x & 0x3) == 2))
544/*
545 * Get the pin assignment mask
546 * for backward compatibility, if it is null,
547 * get the former sink pin assignment we used to be in <23:16>.
548 */
549#define PD_DP_CFG_PIN(x) ((((x) >> 8) & 0xff) ? (((x) >> 8) & 0xff) : (((x) >> 16) & 0xff))
550/*
551 * ChromeOS specific PD device Hardware IDs. Used to identify unique
552 * products and used in VDO_INFO. Note this field is 10 bits.
553 */
554#define USB_PD_HW_DEV_ID_RESERVED 0
555#define USB_PD_HW_DEV_ID_ZINGER 1
556#define USB_PD_HW_DEV_ID_MINIMUFFIN 2
557#define USB_PD_HW_DEV_ID_DINGDONG 3
558#define USB_PD_HW_DEV_ID_HOHO 4
559#define USB_PD_HW_DEV_ID_HONEYBUNS 5
560
561/*
562 * ChromeOS specific VDO_CMD_READ_INFO responds with device info including:
563 * RW Hash: First 20 bytes of SHA-256 of RW (20 bytes)
564 * HW Device ID: unique descriptor for each ChromeOS model (2 bytes)
565 * top 6 bits are minor revision, bottom 10 bits are major
566 * SW Debug Version: Software version useful for debugging (15 bits)
567 * IS RW: True if currently in RW, False otherwise (1 bit)
568 */
569#define VDO_INFO(id, id_minor, ver, is_rw) \
570 ((id_minor) << 26 | ((id) & 0x3ff) << 16 | ((ver) & 0x7fff) << 1 | ((is_rw) & 1))
571#define VDO_INFO_HW_DEV_ID(x) ((x) >> 16)
572#define VDO_INFO_SW_DBG_VER(x) (((x) >> 1) & 0x7fff)
573#define VDO_INFO_IS_RW(x) ((x) & 1)
574
575#define HW_DEV_ID_MAJ(x) (x & 0x3ff)
576#define HW_DEV_ID_MIN(x) ((x) >> 10)
577
578/* USB-IF SIDs */
579#define USB_SID_PD 0xff00 /* power delivery */
580#define USB_SID_DISPLAYPORT 0xff01
581
582#define USB_GOOGLE_TYPEC_URL "http://www.google.com/chrome/devices/typec"
583/* USB Vendor ID assigned to Google Inc. */
584#define USB_VID_GOOGLE 0x18d1
585
586/* Other Vendor IDs */
587#define USB_VID_APPLE 0x05ac
588
589/* Timeout for message receive in microseconds */
590#define USB_PD_RX_TMOUT_US 1800
591
592 /* --- Protocol layer functions --- */
593
594 enum pd_states
595 {
596 PD_STATE_DISABLED,
597 PD_STATE_SUSPENDED,
598#ifdef CONFIG_USB_PD_DUAL_ROLE
599 PD_STATE_SNK_DISCONNECTED,
600 PD_STATE_SNK_DISCONNECTED_DEBOUNCE,
601 PD_STATE_SNK_HARD_RESET_RECOVER,
602 PD_STATE_SNK_DISCOVERY,
603 PD_STATE_SNK_REQUESTED,
604 PD_STATE_SNK_TRANSITION,
605 PD_STATE_SNK_READY,
606
607 PD_STATE_SNK_SWAP_INIT,
608 PD_STATE_SNK_SWAP_SNK_DISABLE,
609 PD_STATE_SNK_SWAP_SRC_DISABLE,
610 PD_STATE_SNK_SWAP_STANDBY,
611 PD_STATE_SNK_SWAP_COMPLETE,
612
613 PD_STATE_SRC_SWAP_INIT,
614 PD_STATE_SRC_SWAP_SNK_DISABLE,
615 PD_STATE_SRC_SWAP_SRC_DISABLE,
616 PD_STATE_SRC_SWAP_STANDBY,
617#endif /* CONFIG_USB_PD_DUAL_ROLE */
618
619 PD_STATE_SRC_DISCONNECTED,
620 PD_STATE_SRC_DISCONNECTED_DEBOUNCE,
621 PD_STATE_SRC_HARD_RESET_RECOVER,
622 PD_STATE_SRC_STARTUP,
623 PD_STATE_SRC_DISCOVERY,
624 PD_STATE_SRC_NEGOCIATE,
625 PD_STATE_SRC_ACCEPTED,
626 PD_STATE_SRC_POWERED,
627 PD_STATE_SRC_TRANSITION,
628 PD_STATE_SRC_READY,
629 PD_STATE_SRC_GET_SINK_CAP,
630 PD_STATE_DR_SWAP,
631
632#ifdef CONFIG_USB_PD_DUAL_ROLE
633#ifdef CONFIG_USBC_VCONN_SWAP
634 PD_STATE_VCONN_SWAP_SEND,
635 PD_STATE_VCONN_SWAP_INIT,
636 PD_STATE_VCONN_SWAP_READY,
637#endif /* CONFIG_USBC_VCONN_SWAP */
638#endif /* CONFIG_USB_PD_DUAL_ROLE */
639
640 PD_STATE_SOFT_RESET,
641 PD_STATE_HARD_RESET_SEND,
642 PD_STATE_HARD_RESET_EXECUTE,
643#ifdef CONFIG_COMMON_RUNTIME
644 PD_STATE_BIST_RX,
645 PD_STATE_BIST_TX,
646#endif
647
648#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
649 PD_STATE_DRP_AUTO_TOGGLE,
650#endif
651 PD_STATE_ENTER_USB, /* C39 */
652 /* Number of states. Not an actual state. */
653 PD_STATE_COUNT,
654 };
655
656#define PD_FLAGS_PING_ENABLED (1 << 0) /* SRC_READY pings enabled */
657#define PD_FLAGS_PARTNER_DR_POWER (1 << 1) /* port partner is dualrole power */
658#define PD_FLAGS_PARTNER_DR_DATA (1 << 2) /* port partner is dualrole data */
659#define PD_FLAGS_CHECK_IDENTITY (1 << 3) /* discover identity in READY */
660#define PD_FLAGS_SNK_CAP_RECVD (1 << 4) /* sink capabilities received */
661#define PD_FLAGS_TCPC_DRP_TOGGLE (1 << 5) /* TCPC-controlled DRP toggling */
662#define PD_FLAGS_EXPLICIT_CONTRACT (1 << 6) /* explicit pwr contract in place */
663#define PD_FLAGS_VBUS_NEVER_LOW (1 << 7) /* VBUS input has never been low */
664#define PD_FLAGS_PREVIOUS_PD_CONN (1 << 8) /* previously PD connected */
665#define PD_FLAGS_CHECK_PR_ROLE (1 << 9) /* check power role in READY */
666#define PD_FLAGS_CHECK_DR_ROLE (1 << 10) /* check data role in READY */
667#define PD_FLAGS_PARTNER_UNCONSTR (1 << 11) /* port partner unconstrained pwr */
668#define PD_FLAGS_VCONN_ON (1 << 12) /* vconn is being sourced */
669#define PD_FLAGS_TRY_SRC (1 << 13) /* Try.SRC states are active */
670#define PD_FLAGS_PARTNER_USB_COMM (1 << 14) /* port partner is USB comms */
671#define PD_FLAGS_UPDATE_SRC_CAPS (1 << 15) /* send new source capabilities */
672#define PD_FLAGS_TS_DTS_PARTNER (1 << 16) /* partner has rp/rp or rd/rd */
673
674/*
675 * These PD_FLAGS_LPM* flags track the software state (PD_LPM_FLAGS_REQUESTED)
676 * and hardware state (PD_LPM_FLAGS_ENGAGED) of the TCPC low power mode.
677 * PD_FLAGS_LPM_TRANSITION is set while the HW is transitioning into or out of
678 * low power (when PD_LPM_FLAGS_ENGAGED is changing).
679 */
680#ifdef CONFIG_USB_PD_TCPC_LOW_POWER
681#define PD_FLAGS_LPM_REQUESTED (1 << 17) /* Tracks SW LPM state */
682#define PD_FLAGS_LPM_ENGAGED (1 << 18) /* Tracks HW LPM state */
683#define PD_FLAGS_LPM_TRANSITION (1 << 19) /* Tracks HW LPM transition */
684#define PD_FLAGS_LPM_EXIT (1 << 19) /* Tracks HW LPM exit */
685#endif
686/*
687 * Tracks whether port negotiation may have stalled due to not starting reset
688 * timers in SNK_DISCOVERY
689 */
690#define PD_FLAGS_SNK_WAITING_BATT (1 << 21)
691/* Check vconn state in READY */
692#define PD_FLAGS_CHECK_VCONN_STATE (1 << 22)
693
694#ifdef CONFIG_USB_PD_DUAL_ROLE
695
696 /* Per-port battery backed RAM flags */
697#define PD_BBRMFLG_EXPLICIT_CONTRACT (1 << 0)
698#define PD_BBRMFLG_POWER_ROLE (1 << 1)
699#define PD_BBRMFLG_DATA_ROLE (1 << 2)
700#define PD_BBRMFLG_VCONN_ROLE (1 << 3)
701#define PD_BBRMFLG_DBGACC_ROLE (1 << 4)
702
703/* Initial value for CC debounce variable */
704#define PD_CC_UNSET -1
705
706 enum pd_dual_role_states
707 {
708 /* While disconnected, toggle between src and sink */
709 PD_DRP_TOGGLE_ON,
710 /* Stay in src until disconnect, then stay in sink forever */
711 PD_DRP_TOGGLE_OFF,
712 /* Stay in current power role, don't switch. No auto-toggle support */
713 PD_DRP_FREEZE,
714 /* Switch to sink */
715 PD_DRP_FORCE_SINK,
716 /* Switch to source */
717 PD_DRP_FORCE_SOURCE,
718 };
724 enum pd_dual_role_states pd_get_dual_role(void);
725
726#ifndef CONFIG_CHARGER
730 int board_get_battery_soc();
731#endif
732
733 void pd_set_dual_role_no_wakeup(enum pd_dual_role_states state);
734
741 void pd_set_dual_role(enum pd_dual_role_states state);
742
748 int pd_get_role();
749
750 // TODO HACK below
751 int is_sourcing();
752 int send_control(int type);
753 // endofTODO
754
755#endif
756
757 /* Control Message type */
758 enum pd_ctrl_msg_type
759 {
760 /* 0 Reserved */
761 PD_CTRL_GOOD_CRC = 1,
762 PD_CTRL_GOTO_MIN = 2,
763 PD_CTRL_ACCEPT = 3,
764 PD_CTRL_REJECT = 4,
765 PD_CTRL_PING = 5,
766 PD_CTRL_PS_RDY = 6,
767 PD_CTRL_GET_SOURCE_CAP = 7,
768 PD_CTRL_GET_SINK_CAP = 8,
769 PD_CTRL_DR_SWAP = 9,
770 PD_CTRL_PR_SWAP = 10,
771 PD_CTRL_VCONN_SWAP = 11,
772 PD_CTRL_WAIT = 12,
773 PD_CTRL_SOFT_RESET = 13,
774 /* 14-15 Reserved */
775
776 /* Used for REV 3.0 */
777 PD_CTRL_NOT_SUPPORTED = 16,
778 PD_CTRL_GET_SOURCE_CAP_EXT = 17,
779 PD_CTRL_GET_STATUS = 18,
780 PD_CTRL_FR_SWAP = 19,
781 PD_CTRL_GET_PPS_STATUS = 20,
782 PD_CTRL_GET_COUNTRY_CODES = 21,
783 /* 22-31 Reserved */
784 };
785
786/* Control message types which always mark the start of an AMS */
787#define PD_CTRL_AMS_START_MASK \
788 ((1 << PD_CTRL_GOTO_MIN) | (1 << PD_CTRL_GET_SOURCE_CAP) | (1 << PD_CTRL_GET_SINK_CAP) | (1 << PD_CTRL_DR_SWAP) | \
789 (1 << PD_CTRL_PR_SWAP) | (1 << PD_CTRL_VCONN_SWAP) | (1 << PD_CTRL_GET_SOURCE_CAP_EXT) | \
790 (1 << PD_CTRL_GET_STATUS) | (1 << PD_CTRL_FR_SWAP) | (1 << PD_CTRL_GET_PPS_STATUS) | \
791 (1 << PD_CTRL_GET_COUNTRY_CODES))
792
793/* Battery Status Data Object fields for REV 3.0 */
794#define BSDO_CAP_UNKNOWN 0xffff
795#define BSDO_CAP(n) (((n) & 0xffff) << 16)
796#define BSDO_INVALID (1 << 8)
797#define BSDO_PRESENT (1 << 9)
798#define BSDO_DISCHARGING (1 << 10)
799#define BSDO_IDLE (1 << 11)
800
801/* Get Battery Cap Message fields for REV 3.0 */
802#define BATT_CAP_REF(n) (((n) >> 16) & 0xff)
803
804 /* Extended message type for REV 3.0 */
805 enum pd_ext_msg_type
806 {
807 /* 0 Reserved */
808 PD_EXT_SOURCE_CAP = 1,
809 PD_EXT_STATUS = 2,
810 PD_EXT_GET_BATTERY_CAP = 3,
811 PD_EXT_GET_BATTERY_STATUS = 4,
812 PD_EXT_BATTERY_CAP = 5,
813 PD_EXT_GET_MANUFACTURER_INFO = 6,
814 PD_EXT_MANUFACTURER_INFO = 7,
815 PD_EXT_SECURITY_REQUEST = 8,
816 PD_EXT_SECURITY_RESPONSE = 9,
817 PD_EXT_FIRMWARE_UPDATE_REQUEST = 10,
818 PD_EXT_FIRMWARE_UPDATE_RESPONSE = 11,
819 PD_EXT_PPS_STATUS = 12,
820 PD_EXT_COUNTRY_INFO = 13,
821 PD_EXT_COUNTRY_CODES = 14,
822 /* 15-31 Reserved */
823 };
824
825 /* Data message type */
826 enum pd_data_msg_type
827 {
828 /* 0 Reserved */
829 PD_DATA_SOURCE_CAP = 1,
830 PD_DATA_REQUEST = 2,
831 PD_DATA_BIST = 3,
832 PD_DATA_SINK_CAP = 4,
833 /* 5-14 Reserved for REV 2.0 */
834 PD_DATA_BATTERY_STATUS = 5,
835 PD_DATA_ALERT = 6,
836 PD_DATA_GET_COUNTRY_INFO = 7,
837 /* 8-14 Reserved for REV 3.0 */
838 PD_DATA_ENTER_USB = 8,
839 PD_DATA_VENDOR_DEF = 15,
840 };
841
842 /*
843 * Cable plug. See 6.2.1.1.7 Cable Plug. Only applies to SOP' and SOP".
844 * Replaced by pd_power_role for SOP packets.
845 */
846 enum pd_cable_plug
847 {
848 PD_PLUG_FROM_DFP_UFP = 0,
849 PD_PLUG_FROM_CABLE = 1
850 };
851
852 enum cable_outlet
853 {
854 CABLE_PLUG = 0,
855 CABLE_RECEPTACLE = 1,
856 };
857
858/* Protocol revision */
859#define PD_REV10 0
860#define PD_REV20 1
861#define PD_REV30 2
862
863/* Power role */
864#define PD_ROLE_SINK 0
865#define PD_ROLE_SOURCE 1
866/* Data role */
867#define PD_ROLE_UFP 0
868#define PD_ROLE_DFP 1
869/* Vconn role */
870#define PD_ROLE_VCONN_OFF 0
871#define PD_ROLE_VCONN_ON 1
872
873/* chunk is a request or response in REV 3.0 */
874#define CHUNK_RESPONSE 0
875#define CHUNK_REQUEST 1
876
877#ifndef NULL
878#define NULL 0
879#endif
880
881/* collision avoidance Rp values in REV 3.0 */
882#define SINK_TX_OK TYPEC_RP_3A0
883#define SINK_TX_NG TYPEC_RP_1A5
884
885/* Port role at startup */
886#ifndef PD_ROLE_DEFAULT
887#ifdef CONFIG_USB_PD_DUAL_ROLE
888#define PD_ROLE_DEFAULT() PD_ROLE_SINK
889#else
890#define PD_ROLE_DEFAULT() PD_ROLE_SOURCE
891#endif
892#endif
893
894/* Port default state at startup */
895#ifdef CONFIG_USB_PD_DUAL_ROLE
896#define PD_DEFAULT_STATE() \
897 ((PD_ROLE_DEFAULT() == PD_ROLE_SOURCE) ? PD_STATE_SRC_DISCONNECTED : PD_STATE_SNK_DISCONNECTED)
898#else
899#define PD_DEFAULT_STATE() PD_STATE_SRC_DISCONNECTED
900#endif
901
902/* build extended message header */
903/* All extended messages are chunked, so set bit 15 */
904#define PD_EXT_HEADER(cnum, rchk, dsize) ((1 << 15) | ((cnum) << 11) | ((rchk) << 10) | (dsize))
905
906/* build message header */
907#define PD_HEADER(type, prole, drole, id, cnt, rev, ext) \
908 ((type) | ((rev) << 6) | ((drole) << 5) | ((prole) << 8) | ((id) << 9) | ((cnt) << 12) | ((ext) << 15))
909
910/* Used for processing pd header */
911#define PD_HEADER_EXT(header) (((header) >> 15) & 1)
912#define PD_HEADER_CNT(header) (((header) >> 12) & 7)
913/*
914 * NOTE: bit 4 was added in PD 3.0, and should be reserved and set to 0 in PD
915 * 2.0 messages
916 */
917#define PD_HEADER_TYPE(header) ((header) & 0x1F)
918#define PD_HEADER_ID(header) (((header) >> 9) & 7)
919#define PD_HEADER_PROLE(header) (((header) >> 8) & 1)
920#define PD_HEADER_REV(header) (((header) >> 6) & 3)
921#define PD_HEADER_DROLE(header) (((header) >> 5) & 1)
922
923/*
924 * The message header is a 16-bit value that's stored in a 32-bit data type.
925 * SOP* is encoded in bits 31 to 28 of the 32-bit data type.
926 * NOTE: This is not part of the PD spec.
927 */
928#define PD_HEADER_GET_SOP(header) (((header) >> 28) & 0xf)
929#define PD_HEADER_SOP(sop) (((sop) & 0xf) << 28)
930
931 enum pd_msg_type
932 {
933 PD_MSG_SOP,
934 PD_MSG_SOP_PRIME,
935 PD_MSG_SOP_PRIME_PRIME,
936 PD_MSG_SOP_DBG_PRIME,
937 PD_MSG_SOP_DBG_PRIME_PRIME,
938 PD_MSG_SOP_CBL_RST,
939 };
940
941/* Used for processing pd extended header */
942#define PD_EXT_HEADER_CHUNKED(header) (((header) >> 15) & 1)
943#define PD_EXT_HEADER_CHUNK_NUM(header) (((header) >> 11) & 0xf)
944#define PD_EXT_HEADER_REQ_CHUNK(header) (((header) >> 10) & 1)
945#define PD_EXT_HEADER_DATA_SIZE(header) ((header) & 0x1ff)
946
947/* K-codes for special symbols */
948#define PD_SYNC1 0x18
949#define PD_SYNC2 0x11
950#define PD_SYNC3 0x06
951#define PD_RST1 0x07
952#define PD_RST2 0x19
953#define PD_EOP 0x0D
954
955/* Minimum PD supply current (mA) */
956#define PD_MIN_MA 500
957
958/* Minimum PD voltage (mV) */
959#define PD_MIN_MV 5000
960
961/* No connect voltage threshold for sources based on Rp */
962#define PD_SRC_DEF_VNC_MV 1600
963#define PD_SRC_1_5_VNC_MV 1600
964#define PD_SRC_3_0_VNC_MV 2600
965
966/* Rd voltage threshold for sources based on Rp */
967#define PD_SRC_DEF_RD_THRESH_MV 200
968#define PD_SRC_1_5_RD_THRESH_MV 400
969#define PD_SRC_3_0_RD_THRESH_MV 800
970
971/* Voltage threshold to detect connection when presenting Rd */
972#define PD_SNK_VA_MV 250
973
974 /* --- Policy layer functions --- */
975
976 /* Request types for pd_build_request() */
977 enum pd_request_type
978 {
979 PD_REQUEST_VSAFE5V,
980 PD_REQUEST_MAX,
981 };
982
983#ifdef CONFIG_USB_PD_REV30
990 int pd_get_rev();
991
998 int pd_get_vdo_ver();
999#else
1000#define pd_get_rev(n) PD_REV20
1001#define pd_get_vdo_ver(n) VDM_VER10
1002#endif
1013 int pd_build_request(uint32_t* rdo, uint32_t* ma, uint32_t* mv, enum pd_request_type req_type);
1014
1021 int pd_is_max_request_allowed(void);
1022
1027 int tcpm_enqueue_message();
1028 int tcpm_has_pending_message();
1029 int tcpm_dequeue_message(uint32_t* const payload, int* const header);
1030 void tcpm_clear_pending_messages();
1031
1032 int consume_sop_prime_repeat_msg(uint8_t msg_id);
1033 int consume_sop_prime_prime_repeat_msg(uint8_t msg_id);
1034 void reset_pd_cable();
1035
1043 void pd_process_source_cap_callback(int cnt, uint32_t* src_caps);
1044
1052 void pd_process_source_cap(int cnt, uint32_t* src_caps);
1053
1063 int pd_find_pdo_index(int max_mv, uint32_t* pdo);
1064
1070 int is_sink_ready();
1071
1077 const char* get_state_cstr();
1078
1086 void pd_extract_pdo_power(uint32_t pdo, uint32_t* ma, uint32_t* mv);
1087
1095 void pd_snk_give_back(uint32_t* const ma, uint32_t* const mv);
1096
1101 void pd_set_max_voltage(unsigned mv);
1102
1107 unsigned pd_get_max_voltage(void);
1108
1115 int pd_is_valid_input_voltage(int mv);
1116
1124 int pd_check_requested_voltage(uint32_t rdo);
1125
1133 int pd_board_check_request(uint32_t rdo, int pdo_cnt);
1134
1140 void pd_transition_voltage(int idx);
1141
1147 void pd_power_supply_reset();
1148
1155 int pd_set_power_supply_ready();
1156
1164 void pd_request_source_voltage(int mv);
1165
1173 void pd_set_external_voltage_limit(int mv);
1174
1182 void pd_set_input_current_limit(uint32_t max_ma, uint32_t supply_voltage);
1183
1189 void pd_update_contract();
1190
1191 /* Encode DTS status of port partner in current limit parameter */
1192 typedef uint32_t typec_current_t;
1193#define TYPEC_CURRENT_DTS_MASK (1 << 31)
1194#define TYPEC_CURRENT_ILIM_MASK (~TYPEC_CURRENT_DTS_MASK)
1195
1203 void typec_set_input_current_limit(typec_current_t max_ma, uint32_t supply_voltage);
1204
1211 void typec_set_source_current_limit(int rp);
1212
1218 int pd_board_checks(void);
1219
1225 void pd_vbus_low();
1226
1233 int pd_is_power_swap_succesful();
1234
1242 int pd_check_data_swap(int data_role);
1243
1251 int pd_check_vconn_swap();
1252
1260 void pd_check_pr_role(int pr_role, int flags);
1261
1269 void pd_check_dr_role(int dr_role, int flags);
1270
1277 void pd_execute_data_swap(int data_role);
1278
1284 void pd_get_info(uint32_t* info_data);
1285
1295 int pd_custom_vdm(int cnt, uint32_t* payload, uint32_t** rpayload);
1296
1306 int pd_svdm(int cnt, uint32_t* payload, uint32_t** rpayload);
1307
1316 uint32_t pd_dfp_enter_mode(uint16_t svid, int opos);
1317
1326 int pd_dfp_exit_mode(uint16_t svid, int opos);
1327
1333 void pd_dfp_pe_init();
1334
1341 uint16_t pd_get_identity_vid();
1342
1353 int pd_dev_store_rw_hash(uint16_t dev_id, uint32_t* rw_hash, uint32_t ec_current_image);
1354
1364 void pd_send_vdm(uint32_t vid, int cmd, const uint32_t* data, int count);
1365
1366 /* Power Data Objects for the source and the sink */
1367 extern const uint32_t pd_src_pdo[];
1368 extern const int pd_src_pdo_cnt;
1369 extern const uint32_t pd_snk_pdo[];
1370 extern const int pd_snk_pdo_cnt;
1371
1377#if defined(HAS_TASK_HOSTCMD) && !defined(TEST_BUILD)
1378 void pd_send_host_event(int mask);
1379#else
1380static inline void pd_send_host_event(int mask) {}
1381#endif
1382
1390 int pd_alt_mode(uint16_t svid);
1391
1398 void pd_send_hpd(enum hpd_event hpd);
1399
1403 extern const struct deferred_data pd_usb_billboard_deferred_data;
1404 /* --- Physical layer functions : chip specific --- */
1405
1406 /* Packet preparation/retrieval */
1407
1408 // REMOVED
1409
1410 /* TX/RX callbacks */
1411
1417 void pd_set_suspend(int enable);
1418
1426 int pd_is_port_enabled();
1427
1428 /* stop listening to the CC wire during transmissions */
1429 void pd_rx_disable_monitoring();
1430
1436 void pd_hw_release();
1437
1444 void pd_hw_init(int role);
1445
1449 void pd_init();
1450
1456 void pd_run_state_machine();
1457
1458 /* --- Protocol layer functions --- */
1459
1465 int pd_comm_is_enabled();
1466
1473 int pd_is_connected();
1474
1480 int pd_is_vbus_present();
1481
1487 void pd_execute_hard_reset();
1488
1495 void pd_transmit_complete(int status);
1496
1502 enum pd_data_role pd_get_data_role();
1503
1509 enum pd_power_role pd_get_power_role();
1510
1516 int pd_is_battery_capable(void);
1517
1523 int pd_is_try_source_capable(void);
1524
1530 void pd_request_vconn_swap();
1531
1538 enum pd_cc_states pd_get_task_cc_state();
1539
1548 uint8_t pd_get_task_state();
1549
1556 const char* pd_get_task_state_name();
1557
1564 int pd_get_vconn_state();
1565
1572 int pd_get_partner_dual_role_power();
1573
1580 int pd_get_partner_unconstr_power();
1581
1587 int pd_get_polarity();
1588
1594 int pd_get_partner_data_swap_capable();
1595
1596 int pd_is_disconnected();
1597
1603 void pd_request_power_swap();
1604
1611 void pd_try_vconn_src();
1612
1618 void pd_request_data_swap();
1619
1628 void pd_comm_enable(int enable);
1629
1638 void pd_ping_enable(int enable);
1639
1640 /* Issue PD soft reset */
1641 void pd_soft_reset(void);
1642
1648 void pd_set_new_power_request();
1649
1656 int pd_ts_dts_plugged();
1657
1658 /* ----- Logging ----- */
1659 static inline void pd_log_event(uint8_t type, uint8_t size_port, uint16_t data, void* payload) {}
1660 static inline int pd_vdm_get_log_entry(uint32_t* payload) { return 0; }
1661
1662#ifdef __cplusplus
1663}
1664#endif
1665
1666#endif /* __CROS_EC_USB_PD_H */
amode_fx
Definition: usb_pd.h:202
pd_policy
Definition: usb_pd.h:276
svdm_amode_data
Definition: usb_pd.h:245
svdm_amode_fx
Definition: usb_pd.h:226
svdm_response
Definition: usb_pd.h:209
svdm_svid_data
Definition: usb_pd.h:219
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